C8051F970-A-GM Datasheet, PDF (362/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 29.4. SMB0ADM: SMBus 0 Slave Address Mask
Bit
7
6
5
4
3
2
1
0
Name
SLVM
EHACK
Type
RW
RW
Reset
1
1
1
1
1
1
1
0
SFR Page = 0x0; SFR Address: 0xF5
Table 29.10. SMB0ADM Register Bit Descriptions
Bit
Name
Function
7:1
SLVM SMBus Slave Address Mask.
Defines which bits of register SMB0ADR are compared with an incoming address byte,
and which bits are ignored. Any bit set to 1 in SLVM enables comparisons with the corre-
sponding bit in SLV. Bits set to 0 are ignored (can be either 0 or 1 in the incoming
address).
0
EHACK Hardware Acknowledge Enable.
Enables hardware acknowledgement of slave address and received data bytes.
0: Firmware must manually acknowledge all incoming address and data bytes.
1: Automatic slave address recognition and hardware acknowledge is enabled.
Rev 1.0
363