C8051F970-A-GM Datasheet, PDF (27/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
2.3. Clocking
The C8051F97x devices have three internal oscillators and the option to use an external crystal, RC, C, or CMOS
oscillator as the system clock. A programmable divider allows the user to internally run the system clock at a
slower rate than the selected oscillator if desired.
2.4. Counters/Timers and PWM
2.4.1. Programmable Counter Array (PCA0)
The C8051F97x devices include a three-channel, 16-bit Programmable Counter Array with the following features:
16-bit time base.
Programmable clock divisor and clock source selection.
Three independently-configurable channels.
8, 9, 10, 11 and 16-bit PWM modes (edge-aligned operation).
Output polarity control.
Frequency output mode.
Capture on rising, falling or any edge.
Compare function for arbitrary waveform generation.
Software timer (internal compare) mode.
Module 2 acts as a Watchdog Timer.
2.4.2. Timers (Timer 0, Timer 1, Timer 2, and Timer 3)
Timers include the following features:
Timer 0 and Timer 1 are standard 8051 timers, supporting backwards-compatibility with firmware and
hardware.
Timer 2 and Timer 3 can each operate as 16-bit auto-reload or two independent 8-bit auto-reload timers,
and include Comparator 0 or SmaRTClock clock capture capabilities.
Rev 1.0
27