C8051F970-A-GM Datasheet, PDF (170/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
20.4. SFR Paging
The CIP-51 features SFR paging, allowing the device to map many SFRs into the 0x80 to 0xFF memory address
space. The SFR memory space has 256 pages. In this way, each memory location from 0x80 to 0xFF can access
up to 256 SFRs. The C8051F97x family of devices utilizes two SFR pages: 0x00 and 0x0F. SFR pages are
selected using the Special Function Register Page register, SFRPAGE. The procedure for reading and writing an
SFR is as follows:
1. Select the appropriate SFR page number using the SFRPAGE register.
2. Use direct accessing mode to read or write the special function register (MOV instruction).
20.5. Interrupts and SFR Paging
When an interrupt occurs, the SFR page register will automatically switch to the SFR page containing the flag bit
that caused the interrupt. The automatic SFR page switch function conveniently removes the burden of switching
SFR pages from the interrupt service routine. Upon execution of the RETI instruction, the SFR page is automati-
cally restored to the SFR page in use prior to the interrupt. This is accomplished via a three-byte SFR page stack.
The top byte of the stack is SFRPAGE, the current SFR page. The second byte of the SFR page stack is
SFRNEXT. The third or bottom byte of the SFR page stack is SFRLAST. Upon entering an interrupt service routine,
the current SFRPAGE value is pushed to the SFRNEXT byte, and the value of SFRNEXT is pushed to SFRLAST.
Hardware then loads SFRPAGE with the SFR page containing the flag bit associated with the interrupt. On a return
from interrupt, the SFR page stack is popped resulting in the value of SFRNEXT returning to the SFRPAGE regis-
ter, thereby restoring the SFR page context without software intervention. The value in SFRLAST (0x00 if there is
no SFR page value in the bottom of the stack) of the stack is placed in SFRNEXT register. If desired, the values
stored in SFRNEXT and SFRLAST may be modified during an interrupt, enabling the CPU to return to a different
SFR page upon execution of the RETI instruction (on interrupt exit). Modifying registers in the SFR page stack
does not cause a push or pop of the stack. Only interrupt calls and returns will cause push/pop operations on the
SFR page stack.
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