C8051F970-A-GM Datasheet, PDF (358/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

29.7. I2C / SMBus Control Registers
C8051F97x
Register 29.1. SMB0CF: SMBus 0 Configuration
Bit
7
6
5
4
3
2
1
0
Name ENSMB
INH
BUSY EXTHOLD SMBTOE SMBFTE
SMBCS
Type
RW
RW
R
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address: 0xC1
Table 29.7. SMB0CF Register Bit Descriptions
Bit
Name
Function
7
ENSMB SMBus Enable.
This bit enables the SMBus interface when set to 1. When enabled, the interface con-
stantly monitors the SDA and SCL pins.
6
INH
SMBus Slave Inhibit.
When this bit is set to logic 1, the SMBus does not generate an interrupt when slave
events occur. This effectively removes the SMBus slave from the bus. Master Mode
interrupts are not affected.
5
BUSY SMBus Busy Indicator.
This bit is set to logic 1 by hardware when a transfer is in progress. It is cleared to logic 0
when a STOP or free-timeout is sensed.
4
EXTHOLD SMBus Setup and Hold Time Extension Enable.
This bit controls the SDA setup and hold times.
0: Disable SDA extended setup and hold times.
1: Enable SDA extended setup and hold times.
3
SMBTOE SMBus SCL Timeout Detection Enable.
This bit enables SCL low timeout detection. If set to logic 1, the SMBus forces Timer 3 to
reload while SCL is high and allows Timer 3 to count when SCL goes low. If Timer 3 is
configured to Split Mode, only the High Byte of the timer is held in reload while SCL is
high. Timer 3 should be programmed to generate interrupts at 25 ms, and the Timer 3
interrupt service routine should reset SMBus communication.
2
SMBFTE SMBus Free Timeout Detection Enable.
When this bit is set to logic 1, the bus will be considered free if SCL and SDA remain high
for more than 10 SMBus clock source periods.
1:0
SMBCS SMBus Clock Source Selection.
This field selects the SMBus clock source, which is used to generate the SMBus bit rate.
See the SMBus clock timing section for additional details.
00: Timer 0 Overflow.
01: Timer 1 Overflow.
10: Timer 2 High Byte Overflow.
11: Timer 2 Low Byte Overflow.
Rev 1.0
359