C8051F970-A-GM Datasheet, PDF (177/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
20.7. CPU Core Registers
Register 20.1. DPL: Data Pointer Low
Bit
7
6
5
4
3
2
1
0
Name
DPL
Type
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = ALL; SFR Address: 0x82
Table 20.2. DPL Register Bit Descriptions
Bit
Name
Function
7:0
DPL
Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed flash memory or XRAM.
178
Rev 1.0