C8051F970-A-GM Datasheet, PDF (176/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
On the execution of the RETI instruction in the SPI0 ISR, the value in SFRPAGE register is overwritten with the
contents of SFRNEXT. The CIP-51 may now access the I2C0STAT register as it did prior to the interrupts occur-
ring. See Figure 20.7.
SFRNEXT
popped to
SFRPAGE
SFR Page 0x00
Automatically
popped off of the
stack on return
from interrupt
0x0F
(I2C0STAT)
SFR Page
Stack SFRs
SFRPAGE
SFRNEXT
SFRLAST
Figure 20.7. SFR Page Stack Upon Return From SPI0 Interrupt
In the example above, all three bytes in the SFR page stack are accessible via the SFRPAGE, SFRNEXT, and
SFRLAST special function registers. If the stack is altered while servicing an interrupt, it is possible to return to a
different SFR page upon interrupt exit than selected prior to the interrupt call. Direct access to the SFR page stack
can be useful to enable real-time operating systems to control and manage context switching between multiple
tasks.
Push operations on the SFR page stack only occur on interrupt service, and pop operations only occur on interrupt
exit (execution on the RETI instruction). The automatic switching of the SFRPAGE and operation of the SFR page
stack as described above can be disabled in software by clearing the SFR Automatic Page Enable Bit (SFRPGEN)
in the SFR page Control Register (SFRPGCN).
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