C8051F970-A-GM Datasheet, PDF (93/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
15. Voltage Regulator (VREG0)
C8051F97x devices include an internal voltage regulator (VREG0) to regulate the internal core supply to 1.8 V
from a VDD supply of 1.8 to 3.6 V. Electrical characteristics for the on-chip regulator are specified in the Electrical
Specifications chapter.
The REG0CN register allows the Precision Oscillator Bias to be disabled, reducing supply current in all non-Sleep
power modes. This bias should only be disabled when the precision oscillator is not being used.
The internal regulator (VREG0) is disabled when the device enters Sleep Mode and remains enabled when the
device enters Suspend Mode. See Section “16. Power Management” on page 94 for complete details about low
power modes.
15.1. Voltage Regulator Control Registers
Register 15.1. REG0CN: Voltage Regulator Control
Bit
7
6
5
4
3
2
1
0
Name
Reserved
OSCBIAS
Reserved
Type
R
RW
R
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address: 0xC9
Bit
Name
Function
7:5
Reserved Must write reset value.
4
OSCBIAS High Frequency Oscillator Bias.
When set to 1, the bias used by the precision High Frequency Oscillator is forced on. If
the precision oscillator is not being used, this bit may be cleared to 0 to reduce supply
current in all non-Sleep power modes.
3:0
Reserved Must write reset value.
Rev 1.0
93