C8051F970-A-GM Datasheet, PDF (175/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
On exit from the PCA interrupt service routine, the CIP-51 will return to the SPI0 ISR. On execution of the RETI
instruction, SFR page 0x00 used to access the PCA registers will be automatically popped off of the SFR page
stack, and the contents of the SFRNEXT register will be moved to the SFRPAGE register. Firmware in the SPI0
ISR can continue to access SFRs as it did prior to the PCA interrupt. Likewise, the contents of SFRLAST are
moved to the SFRNEXT register. Recall this was the SFR page value 0x0F being used to access I2C0STAT before
the SPI0 interrupt occurred. See Figure 20.6.
SFRNEXT
popped to
SFRPAGE
SFRLAST
popped to
SFRNEXT
SFR Page 0x00
Automatically
popped off of the
stack on return
from interrupt
0x00
(SPI0)
0x0F
(I2C0STAT)
SFR Page
Stack SFRs
SFRPAGE
SFRNEXT
SFRLAST
Figure 20.6. SFR Page Stack Upon Return From PCA Interrupt
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Rev 1.0