C8051F970-A-GM Datasheet, PDF (59/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Table 9.2. Special Function Registers (Continued)
Register
CRC0IN
Address SFR Page
0x85
0x0 CRC0 Data Input
Register Description
CS0CF
CS0CN
CS0DH
CS0DL
CS0MD1
CS0MD2
0xAA
0xB0
0xEE
0xED
0xBD
0xBE
0x0 Capacitive Sense 0 Configuration
0x0 Capacitive Sense 0 Control
0x0 Capacitive Sense 0 Data High Byte
0x0 Capacitive Sense 0 Data Low Byte
0x0 Capacitive Sense 0 Mode 1
0x0 Capacitive Sense 0 Mode 2
CS0MD3
CS0MX
CS0PM
CS0SE
CS0SS
CS0THH
CS0THL
DEVICEID
DMA0BUSY
DMA0EN
DMA0INT
DMA0MINT
DMA0NAOH
DMA0NAOL
DMA0NBAH
DMA0NBAL
DMA0NCF
0xBF
0xAB
0x96
0xDE
0xDD
0xFE
0xFD
0xE1
0x91
0x92
0xE8
0x88
0xCC
0xCB
0xCA
0xC9
0xD8
0x0 Capacitive Sense 0 Mode 3
0x0 Capacitive Sense 0 Mux Channel Select
0x0 Capacitive Sense 0 Pin Monitor
0x0 Capacitive Sense 0 Auto Scan End Channel
0x0 Capacitive Sense 0 Auto Scan Start Channel
0x0 Capacitive Sense 0 Comparator Threshold High Byte
0x0 Capacitive Sense 0 Comparator Threshold Low Byte
0xF Device Identification
0xF DMA0 Busy
0xF DMA0 Channel Enable
0xF DMA0 Full-Length Interrupt Flags
0xF DMA0 Mid-Point Interrupt Flags
0xF Memory Address Offset High
0xF Memory Address Offset Low
0xF Memory Base Address High
0xF Memory Base Address Low
0xF DMA0 Channel Configuration
DMA0NSZH
DMA0NSZL
DMA0SEL
DPH
DPL
0xCE
0xCD
0x94
0x83
0x82
0xF Memory Transfer Size High
0xF Memory Transfer Size Low
0xF DMA0 Channel Select
All pages Data Pointer High
All pages Data Pointer Low
Page
237
144
143
145
146
151
152
153
155
154
148
147
149
150
77
194
191
192
193
199
200
197
198
196
201
202
195
179
178
Rev 1.0
59