C8051F970-A-GM Datasheet, PDF (335/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
SCK*
MISO
T
MCKH
T
MCKL
T
MIS
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 28.9. SPI Master Timing (CKPHA = 1)
NSS
T
SE
SCK*
T
CKH
T
CKL
T
SIS
T
SIH
MOSI
MISO
T
SEZ
T
SOH
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 28.10. SPI Slave Timing (CKPHA = 0)
T
SD
T
SDZ
336
Rev 1.0