C8051F970-A-GM Datasheet, PDF (264/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

25.4. RTC0 Control Registers
C8051F97x
Register 25.1. RTC0ADR: RTC Address
Bit
7
6
5
4
3
2
1
0
Name BUSY AUTORD Reserved SHORT
ADDR
Type
RW
RW
R
RW
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address: 0xAC
Bit
Name
Function
7
BUSY RTC Interface Busy Indicator.
This bit indicates the RTC interface status. Writing a 1 to this bit initiates an indirect read.
6
AUTORD RTC Interface Autoread Enable.
When autoread is enabled, firmware should set the BUSY bit once at the beginning of
each series of consecutive reads. Firmware must check if the RTC Interface is busy prior
to reading RTC0DAT.
0: Disable autoread. Firmware must write the BUSY bit for each RTC indirect read oper-
ation.
1: Enable autoread. The next RTC indirect read operation is initiated when firmware
reads the RTC0DAT register.
5
Reserved Must write reset value.
4
SHORT Short Strobe Enable.
Enables/disables the Short Strobe feature.
0: Disable short strobe.
1: Enable short strobe.
3:0
ADDR RTC Indirect Register Address.
Sets the currently-selected RTC internal register.
Note: The ADDR bits increment after each indirect read/write operation that targets a CAPTUREn or ALARMn internal RTC
register.
Rev 1.0
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