C8051F970-A-GM Datasheet, PDF (92/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
14.1. External Interrupt Control Registers
Register 14.1. IT01CF: INT0/INT1 Configuration
Bit
7
6
5
4
3
2
1
0
Name IN1PL
IN1SL
IN0PL
IN0SL
Type
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
1
SFR Page = 0xF; SFR Address: 0xDE
Table 14.1. IT01CF Register Bit Descriptions
Bit
Name
Function
7
IN1PL INT1 Polarity.
0: INT1 input is active low.
1: INT1 input is active high.
6:4
IN1SL INT1 Port Pin Selection.
These bits select which Port pin is assigned to INT1. This pin assignment is independent
of the Crossbar; INT1 will monitor the assigned Port pin without disturbing the peripheral
that has been assigned the Port pin via the Crossbar. The Crossbar will not assign the
Port pin to a peripheral if it is configured to skip the selected pin.
000: Select P0.0.
001: Select P0.1.
010: Select P0.2.
011: Select P0.3.
100: Select P0.4.
101: Select P0.5.
110: Select P0.6.
111: Select P0.7.
3
IN0PL INT0 Polarity.
0: INT0 input is active low.
1: INT0 input is active high.
2:0
IN0SL INT0 Port Pin Selection.
These bits select which Port pin is assigned to INT0. This pin assignment is independent
of the Crossbar; INT0 will monitor the assigned Port pin without disturbing the peripheral
that has been assigned the Port pin via the Crossbar. The Crossbar will not assign the
Port pin to a peripheral if it is configured to skip the selected pin.
000: Select P0.0.
001: Select P0.1.
010: Select P0.2.
011: Select P0.3.
100: Select P0.4.
101: Select P0.5.
110: Select P0.6.
111: Select P0.7.
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Rev 1.0