C8051F970-A-GM Datasheet, PDF (313/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 26.29. P4MDIN: Port 4 Input Mode
Bit
7
6
5
4
3
2
1
0
Name
B7
B6
B5
B4
B3
B2
B1
B0
Type
RW
RW
RW
RW
RW
RW
RW
RW
Reset
1
1
1
1
1
1
1
1
SFR Page = 0xF; SFR Address: 0xF1
Table 26.32. P4MDIN Register Bit Descriptions
Bit
Name
Function
7
B7
Port 4 Bit 7 Input Mode.
0: P4.7 pin is configured for analog mode.
1: P4.7 pin is configured for digital mode.
6
B6
Port 4 Bit 6 Input Mode.
0: P4.6 pin is configured for analog mode.
1: P4.6 pin is configured for digital mode.
5
B5
Port 4 Bit 5 Input Mode.
0: P4.5 pin is configured for analog mode.
1: P4.5 pin is configured for digital mode.
4
B4
Port 4 Bit 4 Input Mode.
0: P4.4 pin is configured for analog mode.
1: P4.4 pin is configured for digital mode.
3
B3
Port 4 Bit 3 Input Mode.
0: P4.3 pin is configured for analog mode.
1: P4.3 pin is configured for digital mode.
2
B2
Port 4 Bit 2 Input Mode.
0: P4.2 pin is configured for analog mode.
1: P4.2 pin is configured for digital mode.
1
B1
Port 4 Bit 1 Input Mode.
0: P4.1 pin is configured for analog mode.
1: P4.1 pin is configured for digital mode.
0
B0
Port 4 Bit 0 Input Mode.
0: P4.0 pin is configured for analog mode.
1: P4.0 pin is configured for digital mode.
Note: Port pins configured for analog mode have their weak pullup, digital driver, and digital receiver disabled.
314
Rev 1.0