C8051F970-A-GM Datasheet, PDF (200/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 21.11. DMA0NSZH: Memory Transfer Size High
Bit
7
6
5
4
3
2
1
0
Name
Reserved
NSZH
Type
R
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0xF; SFR Address: 0xCE
Bit
Name
Function
7:2
Reserved Must write reset value.
1:0
NSZH Memory Transfer Size High.
This field sets the upper two bits of the number of DMA transfers for the selected chan-
nel.
Note: This register is a DMA channel indirect register. Select the desired channel first using the DMA0SEL register.
Rev 1.0
201