C8051F970-A-GM Datasheet, PDF (218/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Bit
Name
Function
1
ADMASRC A DMA Data Source Selection.
This bit controls the source of data for the MAC0 A register when operating in DMA
mode. This bit is ignored when the MAC0 module operates in MCU mode.
0: Each MAC0 operation will request the DMA fetch data from XRAM for the MAC0 A
register.
1: Each MAC0 operation will use existing data in MAC0 A register.
0 APOSTINC A Post-Increment Enable.
This bit controls whether the MAC0 A register value is incremented after a MAC0 opera-
tion. This bit can be used in both MCU and DMA modes.
0: Do not change the MAC0 A register after a MAC0 operation.
1: Increment the MAC0 A register after a MAC0 operation.
Rev 1.0
219