C8051F970-A-GM Datasheet, PDF (179/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 20.3. SP: Stack Pointer
Bit
7
6
5
4
3
2
1
0
Name
SP
Type
RW
Reset
0
0
0
0
0
1
1
1
SFR Page = ALL; SFR Address: 0x81
Table 20.4. SP Register Bit Descriptions
Bit
Name
Function
7:0
SP
Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incre-
mented before every PUSH operation. The SP register defaults to 0x07 after reset.
180
Rev 1.0