C8051F970-A-GM Datasheet, PDF (111/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
17.5. Low Power Mode
The SAR converter provides a low power mode that allows a significant reduction in operating current when
operating at low SAR clock frequencies. Low power mode is enabled by setting the AD0LPM bit (ADC0PWR.7) to
1. In general, low power mode is recommended when operating with SAR conversion clock frequency at 4 MHz or
less. See “1. Electrical Characteristics” on page 10 for details on power consumption and the maximum clock
frequencies allowed in each mode. Setting the Low Power Mode bit reduces the bias currents in both the SAR
converter and in the High-Speed Voltage Reference.
17.6. Window Detector In Single-Ended Mode
Figure 17.5 shows two example window comparisons for right-justified data, with ADC0LTH:ADC0LTL = 0x0080
(128d) and ADC0GTH:ADC0GTL = 0x0040 (64d). The input voltage can range from 0 to VREF x (1023/1024) with
respect to GND, and is represented by a 10-bit unsigned integer value. In the left example, an AD0WINT interrupt
will be generated if the ADC0 conversion word (ADC0H:ADC0L) is within the range defined by
ADC0GTH:ADC0GTL and ADC0LTH:ADC0LTL (if 0x0040 < ADC0H:ADC0L < 0x0080). In the right example, and
AD0WINT interrupt will be generated if the ADC0 conversion word is outside of the range defined by the ADC0GT
and ADC0LT registers (if ADC0H:ADC0L < 0x0040 or ADC0H:ADC0L > 0x0080). Figure 17.6 shows an example
using left-justified data with the same comparison values.
Input Voltage
(Px.x - GND)
VREF x (1023/
1024)
ADC0H:ADC0L
0x03FF
VREF x (128/1024)
VREF x (64/1024)
0x0081
0x0080
0x007F
0x0041
0x0040
0x003F
AD0WINT
not affected
Input Voltage
(Px.x - GND)
VREF x (1023/
1024)
ADC0H:ADC0L
0x03FF
ADC0LTH:ADC0LTL
AD0WINT=1
ADC0GTH:ADC0GTL
VREF x (128/1024)
VREF x (64/1024)
0x0081
0x0080
0x007F
0x0041
0x0040
0x003F
AD0WINT=1
ADC0GTH:ADC0GTL
AD0WINT
not affected
ADC0LTH:ADC0LTL
AD0WINT
not affected
AD0WINT=1
0
0x0000
0
0x0000
Figure 17.5. ADC Window Compare Example: Right-Justified Single-Ended Data
Input Voltage
(Px.x - GND)
VREF x (1023/
1024)
ADC0H:ADC0L
0xFFC0
VREF x (128/1024)
VREF x (64/1024)
0x2040
0x2000
0x1FC0
0x1040
0x1000
0x0FC0
AD0WINT
not affected
Input Voltage
(Px.x - GND)
VREF x (1023/
1024)
ADC0H:ADC0L
0xFFC0
ADC0LTH:ADC0LTL
AD0WINT=1
ADC0GTH:ADC0GTL
VREF x (128/1024)
VREF x (64/1024)
0x2040
0x2000
0x1FC0
0x1040
0x1000
0x0FC0
AD0WINT=1
ADC0GTH:ADC0GTL
AD0WINT
not affected
ADC0LTH:ADC0LTL
AD0WINT
not affected
AD0WINT=1
0
0x0000
0
0x0000
Figure 17.6. ADC Window Compare Example: Left-Justified Single-Ended Data
Rev 1.0
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