C8051F970-A-GM Datasheet, PDF (235/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
23.6. CRC Control Registers
Register 23.1. CRC0CN: CRC0 Control
Bit
7
6
5
Name
Reserved
Type
R
Reset
0
0
0
SFR Page = 0x0; SFR Address: 0x84
4
3
2
1
0
CRCINIT CRCVAL Reserved CRCPNT
RW
RW
R
RW
1
0
0
0
0
Table 23.2. CRC0CN Register Bit Descriptions
Bit
Name
Function
7:4
Reserved Must write reset value.
3
CRCINIT CRC Initialization Enable.
Writing a 1 to this bit initializes the entire CRC result based on CRCVAL.
2
CRCVAL CRC Initialization Value.
This bit selects the set value of the CRC result.
0: CRC result is set to 0x0000 on write of 1 to CRCINIT.
1: CRC result is set to 0xFFFF on write of 1 to CRCINIT.
1
Reserved Must write reset value.
0
CRCPNT CRC Result Pointer.
Specifies the byte of the CRC result to be read/written on the next access to CRC0DAT.
This bit will automatically toggle upon each read or write.
0: CRC0DAT accesses bits 7-0 of the 16-bit CRC result.
1: CRC0DAT accesses bits 15-8 of the 16-bit CRC result.
Note: Upon initiation of an automatic CRC calculation, the three cycles following a write to CRC0CN that initiate a CRC
operation must only contain instructions which execute in the same number of cycles as the number of bytes in the
instruction. An example of such an instruction is a 3-byte MOV that targets the CRC0FLIP register. When programming
in C, the dummy value written to CRC0FLIP should be a non-zero value to prevent the compiler from generating a 2-
byte MOV instruction.
236
Rev 1.0