C8051F970-A-GM Datasheet, PDF (147/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 18.5. CS0SS: Capacitive Sense 0 Auto Scan Start Channel
Bit
7
6
5
4
3
2
1
0
Name
Reserved
CS0SS
Type
R
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address: 0xDD
Bit
Name
Function
7:6
Reserved Must write reset value.
5:0
CS0SS Starting Channel for Auto Scan.
Sets the first CS0 channel to be selected by the mux for Capacitive Sense conversion
when Auto Scan is enabled and active. All channels detailed in CS0MX are possible
choices for this register. When Auto Scan is enabled, a write to CS0SS will also update
CS0MX.
Rev 1.0
147