C8051F970-A-GM Datasheet, PDF (154/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 18.12. CS0PM: Capacitive Sense 0 Pin Monitor
Bit
7
6
5
Name UAPM
SPIPM SMBPM
Type
RW
RW
RW
Reset
0
0
0
SFR Page = 0x0; SFR Address: 0x96
4
PCAPM
RW
0
3
PIOPM
RW
0
2
I2C0PM
RW
0
1
0
CSPMMD
RW
0
0
Bit
Name
Function
7
UAPM UART Pin Monitor Enable.
Enables monitoring of the UART TX pin.
6
SPIPM SPI Pin Monitor Enable.
Enables monitoring SPI output pins.
5
SMBPM SMBus Pin Monitor Enable.
Enables monitoring of the SMBus pins.
4
PCAPM PCA Pin Monitor Enable.
Enables monitoring of PCA output pins.
3
PIOPM Port I/O Pin Monitor Enable.
Enables monitoring of writes to the port latch registers.
2
I2C0PM I2C Slave Pin Monitor Enable.
Enables monitoring of the I2C Slave output pin.
1:0 CSPMMD CS0 Pin Monitor Mode.
Selects the operation to take when a monitored signal changes state.
00: Always retry bit cycles on a pin state change.
01: Retry up to twice on consecutive bit cycles.
10: Retry up to four times on consecutive bit cycles.
11: Reserved.
154
Rev 1.0