C8051F970-A-GM Datasheet, PDF (232/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
23. Cyclic Redundancy Check Unit (CRC0)
C8051F97x devices include a cyclic redundancy check unit (CRC0) that can perform a CRC using a 16-bit
polynomial. CRC0 accepts a stream of 8-bit data written to the CRC0IN register. CRC0 posts the 16-bit result to an
internal register. The internal result register may be accessed indirectly using the CRCPNT bits and CRC0DAT
register, as shown in Figure 23.1. CRC0 also has a bit reverse register for quick data manipulation.
Flash
Memory
CRC0IN
8
Automatic
flash read ⁸
control
CRC0
Seed
(0x0000 or
0xFFFF)
Hardware CRC
Calculation
Unit
8
8
CRC0FLIP ⁸
byte-level bit
reversal
8
CRC0DAT
Figure 23.1. CRC0 Block Diagram
23.1. CRC Algorithm
The CRC unit generates a CRC result equivalent to the following algorithm:
1. XOR the input with the most-significant bits of the current CRC result. If this is the first iteration of the CRC
unit, the current CRC result will be the set initial value 
(0x0000 or 0xFFFF).
2a. If the MSB of the CRC result is set, shift the CRC result and XOR the result with the selected polynomial.
2b. If the MSB of the CRC result is not set, shift the CRC result.
Repeat Steps 2a/2b for the number of input bits (8). The algorithm is also described in the following example.
Rev 1.0
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