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C8051F970-A-GM Datasheet, PDF (46/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash
C8051F97x
6. QFN-32 Package Specifications
Figure 6.1. QFN-32 Package Drawing
Table 6.1. QFN-32 Package Dimensions
Dimension Min
Typ
Max
Dimension Min
Typ
Max
A
0.80 0.85 0.90
E2
3.20 3.30 3.40
A1
0.00 0.02 0.05
L
0.35 0.40 0.45
b
0.18 0.25 0.30
aaa
—
—
0.10
D
5.00 BSC
bbb
—
—
0.10
D2
3.20 3.30 3.40
e
0.50 BSC
E
5.00 BSC
ddd
—
—
0.05
eee
—
—
0.08
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220, variation VHHD except
for custom features D2, E2, and L, which are toleranced per supplier designation.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
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Rev 1.0