C8051F970-A-GM Datasheet, PDF (361/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 29.3. SMB0ADR: SMBus 0 Slave Address
Bit
7
6
5
4
3
2
1
0
Name
SLV
GC
Type
RW
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address: 0xF4
Table 29.9. SMB0ADR Register Bit Descriptions
Bit
Name
Function
7:1
SLV
SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement. Only
address bits which have a 1 in the corresponding bit position in SLVM are checked
against the incoming address. This allows multiple addresses to be recognized.
0
GC
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will determine
whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
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Rev 1.0