C8051F970-A-GM Datasheet, PDF (209/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
22.9. Accumulator Alignment (Right Byte Shift)
Accumulator alignment (or right byte shifting) is one of two methods for DMA or MCU to access the 41-bit
accumulator in different ways without changing the contents of the 41-bit accumulator. On power-up reset, this is
the default option by which data is read from the MAC0 Accumulator. The other method of access is the rounding
and saturation logic described on page 210 MAC0 provides 4 different byte alignment options:
No align (no shifting)—this is the default on reset.
SR1 (1 byte right shift)
SR3 (3 byte right shift)
SR4 (4 byte right shift)
The alignment is performed with the appropriate sign extension depending on the setting of SIGNEDEN. The
examples in Table 22.1 and Table 22.2 show what the MCU or DMA would read from MAC0 Accumulator with the
SR3 setting.
Table 22.1. Unsigned Mode (SIGNEDEN = 0)
Byte Position
ACC0
ACC1
ACC2
ACC3
41-Bit Accumulator Value
X0
X1
X2
X3
MAC0 Accumulator Value
X3
X4
0
0
ACCOVF
X4
0
Byte Position
ACC0
ACC1
ACC2
ACC3
ACCOVF
Table 22.2. Signed Mode (SIGNEDEN = 1)
41-Bit Accumulator
Value
X0
X1
X2
X3
X4
MAC0 Accumulator Value
(bit 40 of 41-bit acc = 0)
X3
X4
0
0
0
MAC0 Accumulator Value
(bit 40 of 41-bit acc = 1)
X3
X4
0xff
0xff
0xff
Accumulator alignment does not affect any flag in the MAC0STA.
22.10. Rounding and Saturation
Rounding is another method for the MAC0 to access the 41-bit accumulator without changing its contents. A
rounding engine is included, which can be used to provide a rounded result when operating on fractional numbers.
MAC0 uses an unbiased rounding algorithm to round the data stored in bits 31–16 of the 41-bit accumulator, as
shown in Table 22.3. The 41-bit accumulator is not affected by the rounding engine. Although rounding is primarily
used for fractional data, it can be used in integer mode to obtain a 2-byte right-shifted rounded result. The upper 3
bytes are stuffed with the appropriate bits depending on the SIGNEDEN setting, just like in the Accumulator
Alignment option. The rounding and saturation logic does not affect any flag in the MAC0STA register. Table 22.3
and Table 22.4 show the results for the signed and unsigned rounding.
210
Rev 1.0