C8051F970-A-GM Datasheet, PDF (278/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
26.1. General Port I/O Initialization
Port I/O initialization consists of the following steps:
1. Select the input mode (analog or digital) for all port pins, using the Port Input Mode register (PnMDIN).
2. Select the output mode (open-drain or push-pull) for all port pins, using the Port Output Mode register
(PnMDOUT).
3. Select any pins to be skipped by the I/O crossbar using the Port Skip registers (PnSKIP).
4. Assign port pins to desired peripherals.
5. Enable the crossbar (XBARE = ‘1’).
All port pins must be configured as either analog or digital inputs. Any pins to be used as Comparator or ADC
inputs should be configured as an analog inputs. When a pin is configured as an analog input, its weak pullup,
digital driver, and digital receiver are disabled. This process saves power and reduces noise on the analog input.
Pins configured as digital inputs may still be used by analog peripherals; however this practice is not
recommended.
Additionally, all analog input pins should be configured to be skipped by the crossbar (accomplished by setting the
associated bits in PnSKIP). Port input mode is set in the PnMDIN register, where a ‘1’ indicates a digital input, and
a ‘0’ indicates an analog input. All pins default to digital inputs on reset.
The output driver characteristics of the I/O pins are defined using the Port Output Mode registers (PnMDOUT).
Each port output driver can be configured as either open drain or push-pull. This selection is required even for the
digital resources selected in the XBRn registers, and is not automatic. When the WEAKPUD bit in XBR1 is ‘0’, a
weak pullup is enabled for all Port I/O configured as open-drain. WEAKPUD does not affect the push-pull Port I/O.
Furthermore, the weak pullup is turned off on an output that is driving a ‘0’ to avoid unnecessary power dissipation.
Registers XBR0 and XBR1 must be loaded with the appropriate values to select the digital I/O functions required
by the design. Setting the XBARE bit in XBR2 to ‘1’ enables the crossbar. Until the crossbar is enabled, the
external pins remain as standard port I/O (in input mode), regardless of the XBRn Register settings. For given
XBRn Register settings, one can determine the I/O pin-out using the Priority Decode Table; as an alternative,
Silicon Labs provides configuration utility software to determine the port I/O pin-assignments based on the
crossbar register settings.
The crossbar must be enabled to use port pins as standard port I/O in output mode. Port output drivers of all
crossbar pins are disabled whenever the crossbar is disabled.
Rev 1.0
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