C8051F970-A-GM Datasheet, PDF (101/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 16.2. PMU0CF: Power Management Unit Configuration
Bit
7
6
5
Name SLEEP SUSPEND CLEAR
Type
RW
RW
RW
Reset
0
0
0
SFR Page = 0x0; SFR Address: 0xB5
4
RSTWK
RW
0
3
RTCFWK
RW
0
2
RTCAWK
RW
0
1
PMATWK
RW
0
0
Reserved
RW
0
Bit
Name
Function
7
SLEEP Sleep Mode Select.
Writing a 1 to this bit places the device in Sleep mode.
6
SUSPEND Suspend Mode Select.
Writing a 1 to this bit places the device in Suspend mode.
5
CLEAR Wake-up Flag Clear.
Writing a 1 to this bit clears all wake-up flags.
4
RSTWK Reset Pin Wake-up Flag.
This bit is set to 1 if a glitch has been detected on RST.
3
RTCFWK RTC Oscillator Fail Wake-up Source Enable and Flag.
Read: Hardware sets this bit to 1 if the RTC oscillator failed.
Write: Write this bit to 1 to enable wake-up on an RTC oscillator failure.
2
RTCAWK RTC Alarm Wake-up Source Enable and Flag.
Read: Hardware sets this bit to 1 if the RTC Alarm occured.
Write: Write this bit to 1 to enable wake-up on an RTC Alarm.
1
PMATWK Port Match Wake-up Source Enable and Flag.
Read: Hardware sets this bit to 1 if Port Match event occured.
Write: Write this bit to 1 to enable wake-up on a Port Match event.
0
Reserved Must write reset value.
Notes:
1. Read-modify-write operations (ORL, ANL, etc.) should not be used on this register. Wake-up sources must be re-
enabled each time the SLEEP or SUSPEND bits are written to 1.
2. The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep Mode if any
wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after each wake-up from
Suspend or Sleep Modes.
3. PMU0 requires two system clocks to update the wake-up source flags after waking from Suspend mode. The wake-up
source flags will read 0 during the first two system clocks following the wake from Suspend mode.
Rev 1.0
101