C8051F970-A-GM Datasheet, PDF (197/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 21.8. DMA0NBAL: Memory Base Address Low
Bit
7
6
5
4
3
2
1
0
Name
NBAL
Type
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0xF; SFR Address: 0xC9
Bit
Name
Function
7:0
NBAL Memory Base Address Low.
This field sets low byte of the channel memory base address. This base address is the
starting channel XRAM address if the channel's address offset DMA0NAO is reset to 0.
Note: This register is a DMA channel indirect register. Select the desired channel first using the DMA0SEL register.
198
Rev 1.0