C8051F970-A-GM Datasheet, PDF (140/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
3. This series of tests can be repeated in a variety of noise environments. Comparison of the resulting SNR
tables can then be used to determine how CS0LP adjustments might be used to improve capacitive
sensing in high-interference environments.
18.14. CS0 Analog Multiplexer
The CS0 input multiplexer can be controlled through two methods. The CS0MX register can be written to through
firmware, or the register can be configured automatically using the auto-scan functionality (see Section
“18.8. Automatic Scanning (Method 1—CS0SMEN = 0)” on page 132).
ADC0MX Setting
000000
000001
000010
000011
000100
000101
000110
000111
001000
001001
001010
001011
001100
001101
001110
001111
010000
010001
010010
010011
010100
010101
Table 18.2. ADC0 Input Multiplexer Channels
Signal Name
CS0.0
QFN-48 Pin Name
P0.0
QFN-32 Pin Name
P0.0
CS0.1
CS0.2
CS0.3
CS0.4
CS0.5
P0.1
P0.2
P0.3
P0.4
P0.5
P0.1
P0.2
P0.3
P0.4
P0.5
CS0.6
CS0.7
CS0.8
CS0.9
CS0.10
CS0.11
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
CS0.12
CS0.13
CS0.14
CS0.15
CS0.16
P1.4
P1.5
P1.6
P1.7
P2.0
P1.4
P1.5
P1.6
P1.7
P2.0
CS0.17
CS0.18
CS0.19
CS0.20
CS0.21
P2.1
P2.2
P2.3
P2.4
P2.5
P2.1
P2.2
P2.3
P2.4
P2.5
QFN-24 Pin Name
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
Reserved
Reserved
Reserved
Reserved
140
Rev 1.0