C8051F970-A-GM Datasheet, PDF (69/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
be found in “AN201: Writing to Flash From Firmware", available from the Silicon Laboratories web site.
9. Disable interrupts prior to setting PSWE to a '1' and leave them disabled until after PSWE has been reset
to 0. Any interrupts posted during the flash write or erase operation will be serviced in priority order after
the flash operation has been completed and interrupts have been re-enabled by software.
10. Make certain that the flash write and erase pointer variables are not located in XRAM. See your compiler
documentation for instructions regarding how to explicitly locate variables in different memory areas.
11. Add address bounds checking to the routines that write or erase flash memory to ensure that a routine
called with an illegal address does not result in modification of the flash.
10.4.3. System Clock
12. If operating from an external crystal-based source, be advised that crystal performance is susceptible to
electrical interference and is sensitive to layout and to changes in temperature. If the system is operating in
an electrically noisy environment, use the internal oscillator or use an external CMOS clock.
13. If operating from the external oscillator, switch to the internal oscillator during flash write or erase
operations. The external oscillator can continue to run, and the CPU can switch back to the external
oscillator after the flash operation has completed.
Additional flash recommendations and example code can be found in “AN201: Writing to Flash From Firmware",
available from the Silicon Laboratories website.
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