MMC2107 Datasheet, PDF (98/618 Pages) –

Freescale Semiconductor, Inc.
Chip Configuration Module (CCM)
Technical Data
98
RPLLSEL — PLL Mode Select Bit
When the PLL is enabled, the read-only RPLLSEL bit reflects the
default PLL mode.
1 = Normal PLL mode
0 = 1:1 PLL mode
The default PLL mode can be overridden during reset configuration.
If the default mode is overridden, the PLLSEL bit in the clock module
SYNSR reflects the PLL mode.
RPLLREF — PLL Reference Bit
When the PLL is enabled in normal PLL mode, the read-only
RPLLREF bit reflects the default PLL reference.
1 = Crystal oscillator is PLL reference.
0 = External clock is PLL reference.
The default PLL reference can be overridden during reset
configuration. If the default mode is overridden, the PLLREF bit in the
clock module SYNSR reflects the PLL reference.
RLOAD — Pad Driver Load Bit
The read-only RLOAD bit reflects the pad driver strength
configuration.
1 = Full drive strength
0 = Default drive strength
The default function of the pad driver strength can be overridden
during reset configuration. If the default mode is overridden, the
LOAD bit in CCR reflects the pad driver strength configuration.
BOOTPS — Boot Port Size Bit
If the boot device is configured to be external, the read-only BOOTPS
bit reflects the default selection for the boot port size.
1 = Boot device uses 32-bit port.
0 = Boot device uses 16-bit port.
The default function of the boot port size can be overridden during
reset configuration. If the default mode is overridden, the PS bit in
CSCR0 reflects the boot device port size configuration.
BOOTSEL — Boot Select Bit
This read-only bit reflects the default selection for the boot device.
1 = Boot from external boot device
0 = Boot from internal boot device
Chip Configuration Module (CCM)
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MMC2107 – Rev. 2.0
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