MMC2107 Datasheet, PDF (412/618 Pages) –

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
18.8.2 QADC Test Register
QADCTEST is used only during factory testing of the MCU. Attempts to
access this register outside of factory test mode will result in access
privilege violation.
Address: 0x00ca_0002 and 0x00ca_0003
Bit 15
14
13
12
11
10
9
Bit 8
Read:
Access results in the module generating an access termination transfer error if not in test mode.
Write:
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Access results in the module generating an access termination transfer error if not in test mode.
Write:
Figure 18-4. QADC Test Register (QADCTEST)
18.8.3 Port Data Registers
QADC ports A and B are accessed through two 8-bit port data registers
(PORTQA and PORTQB).
Port QA pins are referred to as PQA[4:3, 1:0] when used as a
bidirectional, 4-bit, input/output port that may be used for
general-purpose digital input signals or digital output signals. Port QA
can also be used for analog inputs (AN[56:55, 53:52]), external trigger
inputs (ETRIG[2:1]), and external multiplexer address outputs (MA[1:0]).
Port QB pins are referred to as PQB[3:0] when used as an input-only,
4-bit, digital port that may be used for general-purpose digital input
signals. Data for PQB[3:0] is accessed from PORTQB. Port QB can also
be used for non-multiplexed (AN[3:0]) and multiplexed (ANz, ANy, ANx,
ANw) analog inputs.
PORTQA and PORTQB are not initialized by reset.
Technical Data
412
Queued Analog-to-Digital Converter (QADC)
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Go to: www.freescale.com
MMC2107 – Rev. 2.0
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