MMC2107 Datasheet, PDF (550/618 Pages) –

Freescale Semiconductor, Inc.
JTAG Test Access Port and OnCE
Table 21-3. Boundary-Scan Register Definition (Sheet 2 of 4)
(Note: Shaded regions indicate optional pins)
Bit
Logical State and Direction
Control Bits for Each Pin
34 EB1 logical state
35 EB1 direction control
36 TA logical state
37 TA direction control
38 EB2 logical state
39 EB2 direction control
40 SHS logical state
41 SHS direction control
42 EB3 logical state
43 EB3 direction control
44 OE logical state
45 OE direction control
46 SS logical state
47 SS direction control
48 SCK logical state
49 SCK direction control
50 MISO logical state
51 MISO direction control
52 MOSI logical state
53 MOSI direction control
54 INT7 logical state
55 INT7 direction control
56 INT6 logical state
57 INT6 direction control
58 CS0 logical state
59 CS0 direction control
60 CS1 logical state
61 CS1 direction control
62 INT5 logical state
63 INT5 direction control
Bit
Logical State and Direction
Control Bits for Each Pin
64 CS2 logical state
65 CS2 direction control
66 INT4 logical state
67 INT4 direction control
68 CS3 logical state
69 CS3 direction control
70 TC0 logical state
71 TC0 direction control
72 INT3 logical state
73 INT3 direction control
74 TC1 logical state
75 TC1 direction control
76 INT2 logical state
77 INT2 direction control
78 INT1 logical state
79 INT1 direction control
80 INT0 logical state
81 INT0 direction control
82 RXD1 logical state
83 RXD1 direction control
84 TXD1 logical state
85 TXD1 direction control
86 RXD2 logical state
87 RXD2 direction control
88 TC2 logical state
89 TC2 direction control
90 TXD2 logical state
91 TXD2 direction control
92 CSE0 logical state
93 CSE0 direction control
Technical Data
550
JTAG Test Access Port and OnCE
For More Information On This Product,
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA