MMC2107 Datasheet, PDF (96/618 Pages) –

Freescale Semiconductor, Inc.
Chip Configuration Module (CCM)
SZEN — TSIZ[1:0] Enable Bits
This read/write bit enables the TSIZ[1:0] function of the external pins.
1 = TSIZ[1:0] function enabled
0 = TSIZ[1:0] function disabled
PSTEN — PSTAT[3:0] Signal Enable Bits
This read/write bit enables the PSTAT[3:0] function of the external
pins.
1 = PSTAT[3:0] function enabled
0 = PSTAT[3:0] function disabled
SHINT — Show Interrupt Bit
The SHINT bit allows visibility to any active interrupt request to the
processor. If the SHINT bit is set, the RSTOUT pin is the OR of the
fast and normal interrupt signals.
1 = Internal requests reflected on RSTOUT pin
0 = Normal RSTOUT pin function
The SHINT bit is read/write always.
NOTE: The FRCRSTOUT function in the reset controller has a higher priority
than the SHINT function.
BME — Bus Monitor External Enable Bit
The BME bit enables the bus monitor to operate during external bus
cycles.
1 = Bus monitor enabled on external bus cycles
0 = Bus monitor disabled on external bus cycles
Table 3-2 shows the read/write accessibility of this write-once bit.
BMD — Bus Monitor Debug Mode Bit
The BMD bit controls how the bus monitor responds during debug
mode.
1 = Bus monitor enabled in debug mode
0 = Bus monitor disabled in debug mode
This bit is read/write always.
Technical Data
96
Chip Configuration Module (CCM)
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MMC2107 – Rev. 2.0
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