MMC2107 Datasheet, PDF (147/618 Pages) –

Freescale Semiconductor, Inc.
M•CORE M210 Central Processor Unit (CPU)
Programming Model
6.5 Programming Model
Figure 6-2 shows the M•CORE programming model. The model is
defined differently for supervisor and user privilege modes. By
convention, in both modes R15 serves as the link register for subroutine
calls. R0 is typically used as stack pointer.
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
PC
C
USER PROGRAMMER’S
MODEL
R0’
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
ALTERNATE FILE
PSR
VBR
EPSR
FPSR
EPC
FPC
SS0
SS1
SS2
SS3
SS4
GCR
GSR
PC
C ^{* BIT 0 OF PSR}
SUPERVISOR PROGRAMMER’S
MODEL
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
CR9
CR10
CR11
CR12
Figure 6-2. Programming Model
The user programming model consists of 16 general-purpose 32-bit
registers (R[15:0]), the 32-bit PC, and the C bit. The C bit is implemented
as bit 0 of the processor status register (PSR) and is the only portion of
the PSR accessible in the user model.
MMC2107 – Rev. 2.0
MOTOROLA
M•CORE M210 Central Processor Unit (CPU)
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Technical Data
147