MMC2107 Datasheet, PDF (309/618 Pages) –

Freescale Semiconductor, Inc.
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
15.7.10 Timer Interrupt Enable Register
Address: TIM1 — 0x00ce_000c
TIM2 — 0x00cf_000c
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
C3I
C2I
C1I
C0I
Write:
Reset: 0
0
0
0
0
0
0
0
= Writes have no effect and the access terminates without a transfer error exception.
Figure 15-13. Timer Interrupt Enable Register (TIMIE)
Read: Anytime
Write: Anytime
C[3:0]I — Channel Interrupt Enable Bits
C[3:0]I enable the C[3:0]F flags in timer flag register 1 to generate
interrupt requests.
1 = Corresponding channel interrupt requests enabled
0 = Corresponding channel interrupt requests disabled
MMC2107 – Rev. 2.0
MOTOROLA
Timer Modules (TIM1 and TIM2)
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Technical Data
309