MMC2107 Datasheet, PDF (468/618 Pages) –

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
completion interrupt, or queue status are used to determine when the
queue has completed.
After the single-scan enable bit is set, a trigger event causes the QADC
to begin execution with the first CCW in the queue. The single-scan
enable bit remains set until the queue is completed. After the queue
reaches completion, the QADC resets the single-scan enable bit to 0. If
the single-scan enable bit is written to a 1 or a 0 by the software before
the queue scan is complete, the queue is not affected. However, if the
software changes the queue operating mode, the new queue operating
mode and the value of the single-scan enable bit are recognized
immediately. The conversion in progress is aborted and the new queue
operating mode takes effect.
In the software-initiated single-scan mode, the writing of a 1 to the
single-scan enable bit causes the QADC to generate a trigger event
internally and the queue execution begins immediately. In the other
single-scan queue operating modes, once the single-scan enable bit is
written, the selected trigger event must occur before the queue can start.
The single-scan enable bit allows the entire queue to be scanned once.
A trigger overrun is captured if a trigger event occurs during queue
execution in an edge-sensitive external trigger mode or a
periodic/interval timer mode.
In the interval timer single-scan mode, the next expiration of the timer is
the trigger event for the queue. After the queue execution is complete,
the queue status is shown as idle. The software can restart the queue by
setting the single-scan enable bit to a 1. Queue execution begins with
the first CCW in the queue.
18.10.6.1 Software-Initiated Single-Scan Mode
Software can initiate the execution of a scan sequence for queues 1 or 2
by selecting the software-initiated single-scan mode, and writing the
single-scan enable bit in QACR1 or QACR2. A trigger event is generated
internally and the QADC immediately begins execution of the first CCW
in the queue. If a pause occurs, another trigger event is generated
internally, and then execution continues without pausing.
The QADC automatically performs the conversions in the queue until an
end-of-queue condition is encountered. The queue remains idle until the
software again sets the single-scan enable bit. While the time to
Technical Data
468
Queued Analog-to-Digital Converter (QADC)
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MMC2107 – Rev. 2.0
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