MMC2107 Datasheet, PDF (79/618 Pages) –

Freescale Semiconductor, Inc.
System Memory Map
Register Map
Address
Register Name
0x00cb_0010
↓
0x00cb_ffff
Unimplemented
Bit Number
Bit 7
6
5
4
3
2
1
Bit 0
Access results in a bus monitor timeout generating an access termination transfer error.
Serial Communications Interface 1 (SCI1) and Serial Communications Interface 2 (SCI2)
Note: Addresses for SCI1 are at 0x00cc_#### and addresses for SCI2 are at 0x00cd_####.
Bit 7
6
5
4
0x00cc_0000
0x00cd_0000
SCI Baud Rate
Register High (SCIBDH)
See page 336.
Read:
Write:
0
0
0
SBR12
Reset: 0
0
0
0
Bit 7
6
5
4
0x00cc_0001
0x00cd_0001
SCI Baud Rate
Register Low (SCIBDL)
See page 336.
Read:
Write:
Reset:
SBR7
0
SBR6
0
SBR5
0
SBR4
0
Bit 7
6
5
4
Read:
0x00cc_0002
0x00cd_0002
SCI Control Register 1
(SCICR1) Write:
See page 337. _Reset:
LOOPS
0
WOMS
0
RSRC
0
M
0
Bit 7
6
5
4
Read:
0x00cc_0003
0x00cd_0003
SCI Control Register 2
TIE
(SCICR2) Write:
See page 340. _Reset:
0
TCIE
RIE
0
0
ILIE
0
Bit 7
6
5
4
0x00cc_0004
0x00cd_0004
SCI Status Register 1
(SCISR1)
See page 342.
Read:
Write:
TDRE
TC
RDRF
IDLE
Reset: 1
1
0
0
Bit 7
6
5
4
0x00cc_0005
0x00cd_0005
SCI Status Register 2 ^Read:
0
(SCISR2) Write:
See page 344. _Reset:
0
0
0
0
0
0
0
3
2
SBR11 SBR10
0
0
3
2
SBR3 SBR2
0
1
3
2
WAKE
ILT
0
0
3
2
TE
RE
0
0
3
2
OR
NF
0
0
3
2
0
0
0
0
1
SBR9
0
1
SBR1
0
1
PE
0
1
RWU
0
1
FE
0
1
0
0
Bit 0
SBR8
0
Bit 0
SBR0
0
Bit 0
PT
0
Bit 0
SBK
0
Bit 0
PF
0
Bit 0
RAF
0
P = Current pin state
U = Unaffected
= Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 26 of 34)
MMC2107 – Rev. 2.0
MOTOROLA
System Memory Map
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Technical Data
79