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MMC2107 Datasheet, PDF (494/618 Pages) –
Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
18.11.5 Accommodating Positive/Negative Stress Conditions
Positive or negative stress refers to conditions which exceed nominally
defined operating limits. Examples include applying a voltage exceeding
the normal limit on an input (for example, voltages outside of the
suggested supply/reference ranges) or causing currents into or out of
the pin which exceed normal limits. QADC specific considerations are
voltages greater than VDDA, VRH, or less than VSSA applied to an analog
input which cause excessive currents into or out of the input. Refer to
Section 22. Electrical Specifications for more information on exact
magnitudes.
Either stress conditions can potentially disrupt conversion results on
neighboring inputs. Parasitic devices, associated with CMOS
processes, can cause an immediate disruptive influence on neighboring
pins. Common examples of parasitic devices are diodes to substrate and
bipolar devices with the base terminal tied to substrate (VSSI/VSSA
ground). Under stress conditions, current injected on an adjacent pin can
cause errors on the selected channel by developing a voltage drop
across the selected channel’s impedances.
Figure 18-51 shows an active parasitic bipolar NPN transistor when an
input pin is subjected to negative stress conditions. Figure 18-52 shows
positive stress conditions can activate a similar PNP transistor.
VStress
+
VIn
RStress IINJN ANn
PIN UNDER
STRESS
10 K
PARASITIC
RSelected IIn
DEVICE
ADJACENT
ANn+1
PIN
Figure 18-51. Input Pin Subjected to Negative Stress
VStress
+
VIn
RStress IINJP ANn
PIN UNDER
STRESS
10 K
RSelected IIn
PARASITIC
DEVICE
ADJACENT
ANn+1
PIN
VDDA
Technical Data
494
Figure 18-52. Input Pin Subjected to Positive Stress
Queued Analog-to-Digital Converter (QADC)
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Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA