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MMC2107 Datasheet, PDF (409/618 Pages) –
Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Memory Map
18.6.5 Multiplexed Analog Input Pins
In the external multiplexed mode, four of the port QB pins are redefined
to each represent four input channels. See Table 18-1.
Table 18-1. Multiplexed Analog Input Channels
Multiplexed
Analog Input
ANw
ANx
ANy
ANz
Channels
Even numbered channels from 0 to 6
Odd numbered channels from 1 to 7
Even channels from 16 to 22
Odd channels from 17 to 23
18.6.6 Voltage Reference Pins
VRH and VRL are the dedicated input pins for the high and low reference
voltages. Separating the reference inputs from the power supply pins
allows for additional external filtering, which increases reference voltage
precision and stability, and subsequently contributes to a higher degree
of conversion accuracy.
18.6.7 Dedicated Analog Supply Pins
VDDA and VSSA pins supply power to the analog subsystems of the
QADC module. Dedicated power is required to isolate the sensitive
analog circuitry from the normal levels of noise present on the digital
power supply.
18.7 Memory Map
The QADC occupies 1 Kbyte, or 512 16-bit entries, of address space.
Ten 16-bit registers are control, port, and status registers, 64 16-bit
entries are the CCW table, and 64 16-bit entries are the result table
which occupies 192 16-bit address locations because the result data is
readable in three data alignment formats. Table 18-2 is the QADC
memory map.
MMC2107 – Rev. 2.0
MOTOROLA
Queued Analog-to-Digital Converter (QADC)
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Technical Data
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