MMC2107 Datasheet, PDF (103/618 Pages) –

Freescale Semiconductor, Inc.
Chip Configuration Module (CCM)
Functional Description
3.8.2 Chip Mode Selection
The chip mode is selected during reset and reflected in the MODE field
of the chip configuration register (CCR). Once reset is exited, the
operating mode cannot be changed. Table 3-8 shows the mode
selection during reset configuration.
Table 3-8. Chip Configuration Mode Selection⁽¹⁾
Chip Configuration
Mode
CCR Register MODE Field
MODE2
MODE1
MODE0
Master mode
D26 driven high D17 driven high D16 driven high
Single-chip mode
D26 driven high D17 driven high D16 driven low
FAST mode
D26 driven high D17 driven low D16 don’t care
Emulation mode
D26 driven low
D17 don’t care
D16 don’t care
1. Modifying the default configurations is possible only if the external RCON pin is asserted.
During reset, certain module configurations depend on whether
emulation mode is active as determined by the state of the internal
emulation signal.
3.8.3 Boot Device Selection
During reset configuration, the CS0 chip select pin is optionally
configured to select an external boot device. In this case, the CSEN bit
in CSCR0 is set, enabling CS0 after reset. CS0 will be asserted for the
initial boot fetch accessed from address 0x0. It is assumed that the reset
vector loaded from address 0x0 causes the CPU to start executing from
external memory space decoded by CS0. Also, the PS bit is configured
for either a 16-bit or 32-bit port size depending on the external boot
device. See Table 3-9.
In emulation mode, the CS1 chip select pin is optionally configured for
emulating an internal memory. In emulation mode and booting from
internal memory, the CSEN bit in CSCR1 is set, enabling CS1 after
reset.
MMC2107 – Rev. 2.0
MOTOROLA
Chip Configuration Module (CCM)
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Technical Data
103