MMC2107 Datasheet, PDF (36/618 Pages) –

List of Figures
Freescale Semiconductor, Inc.
Figure
Title
Page
21-14
21-15
21-16
Control State Register (CTL) . . . . . . . . . . . . . . . . . . . . . . .578
OnCE PC FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 580
Recommended Connector Interface
to JTAG/OnCE Port . . . . . . . . . . . . . . . . . . . . . . . . . . . .583
22-1
22-2
22-3
22-4
22-5
22-6
22-7
22-8
22-9
22-10
22-11
22-12
22-13
V_PP versus Programming Time . . . . . . . . . . . . . . . . . . . . . 595
V_PP versus Programming Pulses . . . . . . . . . . . . . . . . . . . . 595
CLKOUT Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .597
Clock Read/Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . 598
Read/Write Cycle Timing with Wait States. . . . . . . . . . . . . 599
Show Cycle Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600
RESET and Configuration Override Timing . . . . . . . . . . . . 601
SPI Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 603
Test Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 605
Boundary Scan (JTAG) Timing . . . . . . . . . . . . . . . . . . . . . 606
Test Access Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 606
TRST Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 606
Debug Event Pin Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 607
Technical Data
36
List of Figures
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Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA