MMC2107 Datasheet, PDF (458/618 Pages) –

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Situation S5 (Figure 18-27) shows that when multiple queue 2 trigger
events are detected while queue 1 is busy, the trigger overrun error bit
is set, but queue 1 execution is not disturbed. Situation S5 also shows
that the effect of queue 2 trigger events during queue 1 execution is the
same when the pause feature is in use in either queue.
T1
T1
Q1: C1 C2
T2 T2 _PF1
Q2:
C1 C2
C3 C4
T2 T2
CF1
C3 C4
Q1
IDLE
TOR1
ACTIVE
PF2
PAUSE
TOR1
AACCTTIIVVEE
CF2
IDLE
Q2
IDLE
TRIG ACTIVE
PAUSE
TRIG ACTIVE
IDLE
QS
0000
1000 1011
0110
0101 1001 1011
0010
0000
Figure 18-27. CCW Priority Situation 5
The remaining situations, S6 through S11, show the impact of a queue 1
trigger event occurring during queue 2 execution. Queue 1 is higher in
priority, the conversion taking place in queue 2 is aborted, so that there
is not a variable latency time in responding to queue 1 trigger events.
Technical Data
458
Queued Analog-to-Digital Converter (QADC)
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MMC2107 – Rev. 2.0
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