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MMC2107 Datasheet, PDF (80/618 Pages) –
Freescale Semiconductor, Inc.
System Memory Map
Address
0x00cc_0006
0x00cd_0006
0x00cc_0007
0x00cd_0007
0x00cc_0008
0x00cd_0008
0x00cc_0009
0x00cd_0009
0x00cc_000a
0x00cd_000a
0x00cc_000b
↓
0x00cc_000f
0x00cd_000b
↓
0x00cd_000f
0x00cc_0010
↓
0x00cc_ffff
0x00cd_0010
↓
0x00cd_ffff
Register Name
Bit 7
SCI Data Register High Read: R8
(SCIDRH) Write:
See page 345. Reset:
0
Bit 7
Read: R7
SCI Data Register Low
(SCIDRL) Write: T7
See page 345. Reset:
0
Bit 7
SCI Pullup and Reduced
Drive Register
(SCIPURD)
See page 346.
Read:
SCISDOZ
Write:
Reset: 0
Bit 7
SCI Port Data Register
(SCIPORT)
See page 347.
Read:
Write:
Reset:
RSVD7
0
Bit 7
SCI Data Direction
Register (SCIDDR)
See page 348.
Read:
Write:
Reset:
RSVD7
0
Bit 7
6
T8
0
6
R6
T6
0
6
0
0
6
RSVD6
0
6
RSVD6
0
6
5
0
0
5
R5
T5
0
5
RSVD5
0
5
RSVD5
0
5
RSVD5
0
5
Bit Number
4
3
0
0
0
0
4
3
R4
R3
T4
T3
0
0
4
3
0
RDPSCI
0
0
4
3
RSVD4 RSVD3
0
0
4
3
RSVD4 RSVD3
0
0
4
3
2
1
Bit 0
0
0
0
0
0
0
2
1
Bit 0
R2
R1
R0
T2
T1
T0
0
0
0
2
1
Bit 0
0
RSVD1 PUPSCI
0
0
0
2
1
Bit 0
RSVD2 PORTSC1 PORTSC0
0
0
0
2
1
Bit 0
RSVD2 DDRSC1 DDRSC0
0
0
0
2
1
Bit 0
Reserved
Writes have no effect, reads return 0s, and the access terminates
without a transfer error exception.
Bit 7
6
5
4
3
2
1
Bit 0
Unimplemented
Access results in a bus monitor timeout generating an access termination transfer error.
P = Current pin state
U = Unaffected
= Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 27 of 34)
Technical Data
80
System Memory Map
For More Information On This Product,
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA