MMC2107 Datasheet, PDF (378/618 Pages) –

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
17.7.2 SPI Control Register 2
Address: 0x00cb_0001
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
SPISDOZ SPC0
Write:
Reset: 0
0
0
0
0
1
0
0
= Writes have no effect and the access terminates without a transfer error exception.
Figure 17-3. SPI Control Register 2 (SPICR2)
Read: Anytime
Write: Anytime; writing to unimplemented bits has no effect
SPISDOZ — SPI Stop in Doze Bit
The SPIDOZ bit stops the SPI clocks when the CPU is in doze mode.
Reset clears SPISDOZ.
1 = SPI inactive in doze mode
0 = SPI active in doze mode
SPC0 — Serial Pin Control Bit 0
The SPC0 bit enables the bidirectional pin configurations shown in
Table 17-4. Reset clears SPC0.
Table 17-4. Bidirectional Pin Configurations
Pin Mode SPC0 MSTR _{MISO Pin}⁽¹⁾
MOSI Pin⁽²⁾
SCK Pin⁽³⁾
SS Pin⁽⁴⁾
A
Normal
B
0 Slave data output Slave data input SCK input Slave-select input
0
1
Master data input
Master data output
SCK output
MODF input (DDRSP3 = 0)
or GP output (DDRSP3 = 1)
C
Bidirectional 1
D
0 Slave data I/O
1 GP I/O
GP⁽⁵⁾ I/O
Master data I/O
SCK input Slave-select input
SCK output
MODF input (DDRSP3 = 0)
or GP output (DDRSP3 = 1)
1. Slave output is enabled if SPIDDR bit 0 = 1, SS = 0, and MSTR = 0 (A, C).
2. Master output is enabled if SPIDDR bit 1 = 1 and MSTR = 1 (B, D).
3. SCK output is enabled if SPIDDR bit 2 = 1 and MSTR = 1 (B, D).
4. SS output is enabled if SPIDDR bit 3 = 1, SPICR1 bit 1 (SSOE) = 1, and MSTR = 1 (B, D).
5. GP = General-purpose
Technical Data
378
Serial Peripheral Interface Module (SPI)
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MMC2107 – Rev. 2.0
MOTOROLA