MMC2107 Datasheet, PDF (364/618 Pages) –

Freescale Semiconductor, Inc.
Serial Communications Interface Modules (SCI1 and SCI2)
16.12.5.2 Fast Data Tolerance
Figure 16-24 shows how much a fast received frame can be misaligned
without causing a noise error or a framing error. The fast stop bit ends at
RT10 instead of RT16 but is still sampled at RT8, RT9, and RT10.
Technical Data
364
STOP
IDLE OR NEXT FRAME
RECEIVER
RT CLOCK
DATA
SAMPLES
Figure 16-24. Fast Data
For 8-bit data, sampling of the stop bit takes the receiver:
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned data shown in Figure 16-24, the receiver counts
154 RT cycles at the point when the count of the transmitting device is:
10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the
transmitter count for fast 8-bit data with no errors is:
1----5---4-1----5–_{---4-1----6---0-- × 100 = 3.90%}
For 9-bit data, sampling of the stop bit takes the receiver:
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned data shown in Figure 16-24, the receiver counts
170 RT cycles at the point when the count of the transmitting device is:
11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the
transmitter count for fast 9-bit data with no errors is:
1----7---0-1----7–_{---0-1----7---6-- × 100 = 3.53%}
Serial Communications Interface Modules (SCI1 and SCI2)
For More Information On This Product,
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA