MMC2107 Datasheet, PDF (55/618 Pages) –

Freescale Semiconductor, Inc.
System Memory Map
Register Map
Address
0x00c0_0007
0x00c0_0008
0x00c0_0009
↓
0x00c0_000b
0x00c0_000c
0x00c0_000d
0x00c0_000e
0x00c0_000f
0x00c0_0010
Register Name
Bit Number
Bit 7
6
5
4
3
2
1
Bit 0
Port H Output Data
Register (PORTH)
See page 251.
Read:
Write:
Reset:
PORTH7
1
PORTH6
1
PORTH5
1
PORTH4
1
PORTH3
1
PORTH2
1
PORTH1
1
PORTH0
1
Bit 7
6
5
4
3
2
1
Bit 0
Port I Output Data
Register (PORTI)
See page 251.
Read:
Write:
Reset:
PORTI7
1
PORTI6
1
PORTI5
1
PORTI4
1
PORTI3
1
PORTI2
1
PORTI1
1
PORTI0
1
Bit 7
6
5
4
3
2
1
Bit 0
Reserved
Writes have no effect, reads return 0s, and the access terminates
without a transfer error exception.
Bit 7
Port A Data Direction
Register (DDRA)
See page 252.
Read:
Write:
Reset:
DDRA7
0
Bit 7
Port B Data Direction
Register (DDRB)
See page 252.
Read:
Write:
Reset:
DDRB7
0
Bit 7
Port C Data Direction
Register (DDRC)
See page 252.
Read:
Write:
Reset:
DDRC7
0
Bit 7
Port D Data Direction
Register (DDRD)
See page 252.
Read:
Write:
Reset:
DDRD7
0
Bit 7
Port E Data Direction
Register (DDRE)
See page 252.
Read:
Write:
Reset:
DDRE7
0
6
DDRA6
0
6
DDRB6
0
6
DDRC6
0
6
DDRD6
0
6
DDRE6
0
5
DDRA5
0
5
DDRB5
0
5
DDRC5
0
5
DDRD5
0
5
DDRE5
0
4
DDRA4
0
4
DDRB4
0
4
DDRC4
0
4
DDRD4
0
4
DDRE4
0
3
DDRA3
0
3
DDRB3
0
3
DDRC3
0
3
DDRD3
0
3
DDRE3
0
2
DDRA2
0
2
DDRB2
0
2
DDRC2
0
2
DDRD2
0
2
DDRE2
0
1
DDRA1
0
1
DDRB1
0
1
DDRC1
0
1
DDRD1
0
1
DDRE1
0
Bit 0
DDRA0
0
Bit 0
DDRB0
0
Bit 0
DDRC0
0
Bit 0
DDRD0
0
Bit 0
DDRE0
0
P = Current pin state
U = Unaffected
= Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 2 of 34)
MMC2107 – Rev. 2.0
MOTOROLA
System Memory Map
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Go to: www.freescale.com
Technical Data
55