MMC2107 Datasheet, PDF (481/618 Pages) –

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Digital Control
mode has been enabled (the timer is counting), but a trigger event has
not been issued, the debug mode takes effect immediately, and the timer
is held in reset. When the internal FREEZE line is negated, the timer
counter starts counting from the beginning. Refer to 18.5.1 Debug Mode
for more information.
18.10.10 Conversion Command Word Table
The conversion command word (CCW) table is a RAM, 64 words long
on 16-bit address boundaries where 10 bits of each entry are
implemented. A CCW can be programmed by the software to request a
conversion of one analog input channel. The CCW table is written by
software and is not modified by the QADC. Each CCW requests the
conversion of an analog channel to a digital result. The CCW specifies
the analog channel number, the input sample time, and whether the
queue is to pause after the current CCW. The 10 implemented bits of the
CCW word are read/write data, where they may be written when the
software initializes the QADC. The remaining six bits are unimplemented
so these read as 0s, and write operations have no effect. Each location
in the CCW table corresponds to a location in the result word table.
When a conversion is completed for a CCW entry, the 10-bit result is
written in the corresponding result word entry. The QADC provides 64
CCW table entries.
The beginning of queue 1 is the first location in the CCW table. The first
location of queue 2 is specified by the beginning of queue 2 pointer
(BQ2) in QACR2. To dedicate the entire CCW table to queue 1, queue
2 is programmed to be in the disabled mode, and BQ2 is programmed to
64 or greater. To dedicate the entire CCW table to queue 2, queue 1 is
programmed to be in the disabled mode, and BQ2 is specified as the first
location in the CCW table.
Figure 18-44 illustrates the operation of the queue structure.
MMC2107 – Rev. 2.0
MOTOROLA
Queued Analog-to-Digital Converter (QADC)
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Technical Data
481