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MMC2107 Datasheet, PDF (124/618 Pages) –
Signal Description
Freescale Semiconductor, Inc.
4.5.3.8 Address Bus (A[22:0])
These output signals provide the address for the current bus transfer.
4.5.3.9 Enable Byte (EB[3:0])
These output signals indicate which byte of data is valid during external
cycles.
4.5.3.10 Chip Select (CS[3:0])
These output signals select external devices for external bus
transactions.
4.5.3.11 Output Enable (OE)
This output signal indicates when an external device can drive data
during external read cycles.
4.5.4 Edge Port Signals
These signals are used by the edge port module.
4.5.4.1 External Interrupts (INT[7:6])
These bidirectional signals function as either external interrupt sources
or GPIO. Also, these signals may be used to reflect the internal TSIZ[1:0]
signals and externally to provide an indication of the M•CORE transfer
size.
4.5.4.2 External Interrupts (INT[5:2])
These bidirectional signals function as either external interrupt sources
or GPIO. Also, these signals may be used to reflect the internal
PSTAT[3:0] signals and externally to provide an indication of the
M•CORE processor status.
Technical Data
124
Signal Description
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Go to: www.freescale.com
MMC2107 – Rev. 2.0
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