MMC2107 Datasheet, PDF (159/618 Pages) –

Freescale Semiconductor, Inc.
Interrupt Controller Module
Memory Map and Registers
7.7.2.2 Interrupt Status Register
The 16-bit, read-only interrupt status register (ISR) reflects the state of
the interrupt controller outputs to the M•CORE processor. Writes to this
register have no effect and are terminated normally.
Address: 0x00c5_0002 and 0x00c5_0003
Bit 15
14
13
12
11
10
9
Bit 8
Read: 0
0
0
0
0
0
INT
FINT
Write:
Reset: 0
0
0
0
0
0
0
0
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
VEC6 VEC5 VEC4 VEC3 VEC2 VEC1 VEC0
Write:
Reset: 0
0
0
0
0
0
0
0
= Writes have no effect and the access terminates without a transfer error exception.
Figure 7-3. Interrupt Status Register (ISR)
INT — Normal Interrupt Request Flag
The read-only INT flag indicates whether the normal interrupt request
signal to the M•CORE processor is asserted or negated. Reset clears
INT.
1 = Normal interrupt request asserted
0 = Normal interrupt request negated
FINT — Fast Interrupt Request Flag
The read-only FINT flag indicates whether the fast interrupt request
signal to the M•CORE processor is asserted or negated. Reset clears
FINT.
1 = Fast interrupt request asserted
0 = Fast interrupt request negated
VEC[6:0] — Interrupt Vector Number Field
The read-only VEC[6:0] field reflects the state of the 7-bit interrupt
vector number. Reset clears VEC[6:0].
MMC2107 – Rev. 2.0
MOTOROLA
Interrupt Controller Module
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Technical Data
159