MMC2107 Datasheet, PDF (317/618 Pages) –

Freescale Semiconductor, Inc.
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
15.7.16 Pulse Accumulator Flag Register
Address: TIM1 — 0x00ce_0019
TIM2 — 0x00cf_0019
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
PAOVF PAIF
Write:
Reset: 0
0
0
0
0
0
0
0
= Writes have no effect and the access terminates without a transfer error exception.
Figure 15-20. Pulse Accumulator Flag Register (TIMPAFLG)
Read: Anytime
Write: Anytime; writing 1 clears the flag; writing 0 has no effect
PAOVF — Pulse Accumulator Overflow Flag
PAOVF is set when the 16-bit pulse accumulator rolls over from
$FFFF to $0000. If the PAOVI bit in TIMPACTL is also set, PAOVF
generates an interrupt request. Clear PAOVF by writing a 1 to it.
1 = Pulse accumulator overflow
0 = No pulse accumulator overflow
PAIF — Pulse Accumulator Input Flag
PAIF is set when the selected edge is detected at the PAI pin. In event
counter mode, the event edge sets PAIF. In gated time accumulation
mode, the trailing edge of the gate signal at the PAI pin sets PAIF. If
the PAI bit in TIMPACTL is also set, PAIF generates an interrupt
request. Clear PAIF by writing a 1 to it.
1 = Active PAI input
0 = No active PAI input
NOTE: When the fast flag clear all enable bit, TFFCA, is set, any access to the
pulse accumulator counter registers clears all the flags in TIMPAFLG.
MMC2107 – Rev. 2.0
MOTOROLA
Timer Modules (TIM1 and TIM2)
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Technical Data
317